High-performance SOI Pseudo-nMOS Circuit Design Techniques for the Deep Sub-micron Era
| Author | : Jayakumaran Sivagnaname |
| Publisher | : |
| Total Pages | : 294 |
| Release | : 2005 |
| ISBN-10 | : UOM:39015062484228 |
| ISBN-13 | : |
| Rating | : 4/5 ( Downloads) |
Book Synopsis High-performance SOI Pseudo-nMOS Circuit Design Techniques for the Deep Sub-micron Era by : Jayakumaran Sivagnaname
Download or read book High-performance SOI Pseudo-nMOS Circuit Design Techniques for the Deep Sub-micron Era written by Jayakumaran Sivagnaname and published by . This book was released on 2005 with total page 294 pages. Available in PDF, EPUB and Kindle. Book excerpt: