This edited volume presents a collection of papers from the 2003 International Workshop on Innovative Architecture for Future Generation High-Performance Proces

Transactions on HiPEAC aims at the timely dissemination of research contributions in computer architecture and compilation methods for high-performance embedded

High-performance computing (HPC) describes the use of connected computing units to perform complex tasks. It relies on parallelization techniques and algorithms

This book comprises selected papers of the International Conferences, CA and CES3 2011, held as Part of the Future Generation Information Technology Conference,

Innovations in hardware architecture, like hyper-threading or multicore processors, mean that parallel computing resources are available for inexpensive desktop