It is proposed in this thesis that a measure to determine the electrical overstress (EOS) hardness of integrated circuits with respect to EOS/electrostatic disc

Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are

Electrostatic discharge (ESD) failure mechanisms continue to impact semiconductor components and systems as technologies scale from micro- to nano-electronics.